In this blog, I’ll be discussing the evolving architecture of VeriLogger, as well as sharing tips on how to get the most out of the environment. Today I’ll be discussing ways to change what simulator is used by the Verilogger environment to simulate a design.

VeriLogger actually consists of two separate programs: BugHunter Pro , a graphical debugger/testbench generator (executable filename is syncad.exe) and a Verilog simulator. The default Verilog simulator used by BugHunter is SynaptiCAD’s Sim Extreme, a compiled-code Verilog 2001 simulator (executable filename is simx.exe).

BugHunter supports debugging with all the major Verilog and VHDL simulators and it can be easily configured via the GUI to swap out which simulator it uses for performing simulations. In Verilog, it’s fairly easy to accidentally introduce race conditions into your code that will cause simulation output to be different across different simulators, so it’s not a bad idea when you have access to multiple simulators to run your design through multiple simulators and compare the output. This is particularly important when you’re creating IP that is going to customers who may use a different simulator than you used to design your IP.

The first way to set the simulator used by BugHunter is via the command line when BugHunter is started. For example:

syncad -p bhp -S verilogger_extreme

launches the product BugHunter (-p bhp) with the verilog_extreme simulator as the default simulator for new projects.

To override the above default setting for new projects using the GUI, select the menu option Project>Default Project Simulation Properties, click the Settings Template radio button, select the Verilog tab, then set the Simulator Type to the desired simulator.

To change the simulator used for an existing project, select the menu option Project>Project Simulation Properties, click the Verilog tab, and pick the desired simulator from the Simulator Type control.

Debugging information such as breakpoints and which signals to watch in the waveform window are stored in a simulator-independent format inside your project, so this information is portable across simulators. Common compilation options such as include and library paths are also stored in a portable format.

Project files can store multiple configurations, with each configuration storing a list of settings on how to compile the project (what compiler to use and what compilation options). Configurations make it easy to switch between simulators or to simply switch between a “debug simulation” where you build a slower simulation that is fully debuggable versus a “fast simulation” that runs quickly but doesn’t make as much debug info accessible. To create a configuration, use the Project Simulation Properties to set the desired simulator and compilation options, then press the Add button to create the new configuration and give it a name.